Failure analysis of ESD-stressed SiC MESFET
نویسندگان
چکیده
a CNRS, LAAS, 7 Avenue du Colonel Roche, F-31400 Toulouse, France b Univ de Toulouse, UPS, LAAS, F-31400 Toulouse, France c Université de Lyon, CNRS, Laboratoire AMPERE, UMR 5005, INSA de Lyon, F-69621 Villeurbanne, France d Institut de Microelectrónica de Barcelona-Centre Nacional de Microelectrónica (IMB-CNM), Consejo Superior de Investigaciones Científicas (CSIC), Universitat Autònoma de Barcelona, 08193 Barcelona, Spain
منابع مشابه
A novel SiC MESFET with recessed P-Buffer layer
We report, for the first time, a silicon carbide (SiC) based metal semiconductor field effect transistor (MESFET) which has a recessed p-buffer layer into the channel region near the source and a recessed channel into the p-buffer layer region near the drain under the gate. The length and thickness of the channel recess into the p-buffer layer are larger than the pbuffer recess into the channel...
متن کاملDesign and characterization of a broadband SiC power amplifier
Due to the proximity of military and civilian bands at the relevant frequencies low frequency radar and EW systems needs amplifiers which combine a broadband coverage, a high output power and efficiency with a good linearity. The wide bandgap semiconductors SiC and GaN offer an impressive RF and microwave power-frequency capability [1] but relatively few SiC transistor amplifiers have been desi...
متن کاملEsd Failure Analysis Methodology
This paper reviews Failure Analysis methods and discusses the merits and pitfalls associated with some of the more common techniques as they relate to ESD. Although advanced methods such as the Focused Ion Beam will be discussed, the importance of more traditional methods such as liquid crystal, emission microscopy, passive voltage contrast and mechanical polishing will be emphasized. Case hist...
متن کاملElectrostatic Discharge (ESD) and Failure Analysis: Models, Methodologies and Mechanisms for CMOS, Silicon On Insulator and Silicon Germanium Technologies
−Failure analysis is fundamental to the design and development methodology of electrostatic discharge (ESD) devices and ESD robust circuits. The role of failure analysis (FA) in the models, methodology, band mechanisms evaluation for improving ESD robustness of semiconductor products in CMOS, silicon-on-insulator (SOI) and silicon germanium (SiGe) technologies will be reviewed. Index Terms−Reli...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- Microelectronics Reliability
دوره 55 شماره
صفحات -
تاریخ انتشار 2015